Current privilege level 0. The application will run in ring 0 instead of 3. At CPL 0, the program can execute all privileged instructions (such as HLT, LGDT, etc.). However, memory access to read only and system pages is not protected at run time. Note that even at CPL 3, individual functions can be executed at CPL 0 using function RTCallRing0.

Note that the Halt instruction can only be executed at CPL 0 if the target hardware actually supports Halt. For example, the Halt instruction is not supported by some 386EX boards, because these boards do not detect the Halt bus cycle and do not generate the required Ready signal to acknowledge the cycle. Please refer to functions RTHalt and RTHaltCPL3 for further information.

BF_NO_FPU

No 387 compatible floating point unit. The boot code should not attempt to detect an FPU. This is required on many 386EX and AMD Élan targets because any attempt to communicate with a non-existent FPU can hang the CPU. This flag can also be used to test the 387 FPU emulator on a target which has an FPU.

BF_NO_A20

No A20 enabling. The boot code Biosboot.exe should not attempt to enable A20. Use this flag if the boot code's algorithms to enable A20 are incompatible with the target. If this flag is specified and A20 is disabled, and access to memory above 1M is required at run-time, use OUT and InitCode commands to enable A20 instead. By default, Biosboot.exe tries BIOS function int15h/ax=2401h, the PS/2 method via port 92h, and the keyboard controller command D1h to enable A20. Boot codes Boot.exe and Pmboot.exe never attempt to enable A20 and ignore this flag.

BF_NO_KEYBRD

No PC compatible keyboard. When this flag is specified, the boot code will not install and enable a handler for IRQ 1. Biosboot.exe will not attempt to use the keyboard controller to enable A20. In addition, this flag is also checked by the keyboard driver of RTTarget-32.

BF_NO_PCTIMER

No PC compatible 8253 timer chip. When this flag is specified, the boot code and RTTarget-32's Win32 function GetTickCount will not install and enable a handler for IRQ 0. Programs not using RTKernel-32 must override function GetTickCount of library Rtt32.lib to use any time functions. RTKernel-32 programs need custom clock and high resolution timer drivers.

BF_NO_SLAVE_PIC

No PC compatible slave 8259 programmable interrupt controller at port address A0h. When this flag is specified, the boot code will not initialize the slave PIC found on PC compatible systems and it will not enable IRQ 2 on the master PIC.

BF_NO_MASTER_PIC

No PC compatible master 8259 programmable interrupt controller at port address 20h and applications are started with interrupts disabled. When this flag is specified, the boot code will not initialize the master PIC found on PC compatible systems and it will not enable interrupts when control is passed to the application. Note that functions RTEnableIRQ, RTDisableIRQ, and RTIRQEnd must be replaced in library Rtt32.lib and the Debug Monitor must be recompiled if no 8259a master PIC is available. RTKernel-32 programs must be linked with a suitable replacement interrupt driver.

BF_NO_FNESTED

Do not use the interrupt controller's Special Fully Nested Mode. This option is required on some targets which do not have a 100% Intel compatible 8259 interrupt controller (e.g., Vortex86 CPUs, Microsoft's Virtual PC or VMware Workstation). When set, the Fully Nested Mode is used instead.

BF_NO_VESA_LFB

This flag can be used to allow the BIOS boot code to accept VESA graphics modes without a linear frame buffer. The RTPEG-32 and MetaWINDOW drivers can support such modes if the required video RAM address space is smaller than or equal to 64k. The boot code applies this flag automatically to VESA mode 102h (800x600x16 = 60000 byte addresses in 4 bit planes), but not to others.

BF_NO_PCI_BIOS

The target does not have a functional 32-bit protected mode PCI BIOS interface. PCI devices will be discovered and configured by directly accessing the PCI-Host bridge using port I/O.

BF_NO_SPUR_IRQ

Do not display message "Spurious Interrupt". By default, the boot code will display this message each time a spurious interrupt occurs in PIC mode. Spurious interrupts are interrupts which are too short for the interrupt controller to evaluate (hardware error). Spurious Interrupts can occur on IRQ 7 and 15.

Example:

BOOTFLAGS = BF_NO_FPU|BF_NO_KEYBRD   // no blanks around "|" operator

Left Defining Boot Code Options

Down VideoRAM Command